A GSM speech coder implemented on a customized processor architecture
Författare
Summary, in English
- A GSM speech coder has been implemented
on a custom DSP using a system for design
of arbitrary processor architectures. The speech
coder has been generated from a high level description
to netlist. The design system allows implementation
in various technologies and a netlist
for Plessey gate array has been generated. Due
to the rigid specification of the speech coder, the
advantages of a custom DSP can not be fully utilized
and a result in clock cycles and ROM storage
comparable to a standard DSP is achieved.
on a custom DSP using a system for design
of arbitrary processor architectures. The speech
coder has been generated from a high level description
to netlist. The design system allows implementation
in various technologies and a netlist
for Plessey gate array has been generated. Due
to the rigid specification of the speech coder, the
advantages of a custom DSP can not be fully utilized
and a result in clock cycles and ROM storage
comparable to a standard DSP is achieved.
Publiceringsår
1993
Språk
Engelska
Sidor
235-238
Publikation/Tidskrift/Serie
ISCAS '93, 1993 IEEE International Symposium on Circuits and Systems
Länkar
Dokumenttyp
Konferensbidrag
Ämne
- Electrical Engineering, Electronic Engineering, Information Engineering
Conference name
IEEE International Symposium on Circuits and Systems (ISCAS), 1993
Conference date
1993-05-03 - 1993-05-06
Conference place
Chicago, United States
Status
Published
Forskningsgrupp
- Elektronikkonstruktion
ISBN/ISSN/Övrigt
- ISBN: 0-7803-1281-3